Renesas Electronics /R7FA6M3AH /GLCDC /BG_EN

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as BG_EN

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)EN 0 (0)VEN 0 (0)SWRST

EN=0, SWRST=0, VEN=0

Description

Background Plane Setting Operation Control Register

Fields

EN

Background plane generation module operation enable

0 (0): Disables operation.

1 (1): Enables operation.

VEN

Control of LCDC internal register value reflection to internal operations

0 (0): Disables(Cleared to 0 by an internal source)

1 (1): Enables

SWRST

Entire module SW reset control

0 (0): Places the entire module in the SW reset state.

1 (1): Releases the entire module from the SW reset state.

Links

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